The invention relates to an amplifier circuit configuration having a data line for transmitting a data signal, a switching device with a first terminal, which is connected to the data line, and an amplifier for detecting a current. The amplifier has a data signal input, which is connected to a second terminal of the switching device. The amplifier includes a control circuit for controlling an input resistance of the amplifier. The amplifier also has a terminal for a control signal.
To read data from an integrated semiconductor memory, for instance, amplifier circuits of various kinds are used, which are known as read amplifiers (sense amplifiers). An amplifier, i.e. a sense amplifier, is connected to a data line on which a data signal is carried for the purpose of reading the data signal. In an integrated memory having a matrix-type memory cell array in which the cells are combined into units of word lines and bit lines (i.e. row and column lines), the data line is realized as one of the bit lines. The transmitted data are detected and amplified by the read amplifier.
The data of memory cells are read out by current detection. Using the principle of current detection, the current of a memory cell is coupled out with optimally low resistance. To this end, amplifiers are typically constructed such that they have a sufficiently small input resistance. The smaller this resistance is, the less time is generally required to read the memory contents, i.e. the read time is independent upon the capacity of the connection between the memory cells and the amplifier.
A read amplifier of an SRAM (Static Random Access Memory), for instance, is usually significantly larger than the width of the memory cells. For this reason, several column lines are usually allocated to a read amplifier, a respective one of which is connected to the read amplifier by a multiplexer circuit. The multiplexer circuit, which in principle contains several switches, has a positive resistance in series with the input resistance of the read amplifier. The multiplexer circuit thus has a substantial influence on the dynamic response in the read access of the memory.
In the article xe2x80x9cMegabit-Class Size-Configurable 250-MHz SRAM Macrocells with a Squashed-Memory-Cell Architecture,xe2x80x9d Nobutaro Shibata, Hiroshi Inokawa, Keiichiro Tokunaga, Soichi OHTA, IEICE Trans. Electron. Vol. E82 C, No. 1, January 1999, pp. 94-104, various configurations of multiplexer circuits and amplifiers are discussed for reducing the interfering influence of the multiplexer circuit on the dynamic response.
In the article xe2x80x9cCurrent Sense Amplifiers for Low-Voltage Memories,xe2x80x9d Nobutaro Shibata, IEICE Trans. Electron. Vol. E79-C, No. 8, August 1996, pp. 1120-1130, principles and configurations of amplifiers for current detection are described. Various basic circuits of amplifiers there described include a data signal input and a control circuit for controlling the input resistance of the amplifier. An input of the control circuit is connected to the data signal input of the amplifier. This achieves a relatively low input resistance of the amplifier. However, the influence of a multiplexer circuit that is connected on the line side is not taken into account in this solution.
It is accordingly an object of the invention to provide an amplifier circuit configuration which overcomes the above-mentioned disadvantages of the heretofore-known configurations of this general type and which has an amplifier for current detection wherein the influence exerted on the dynamic response in the readout of a data signal by a switching device that is connected between the data line and amplifier, particularly a device contained in a multiplexer circuit, is relatively small.
With the foregoing and other objects in view there is provided, in accordance with the invention, an amplifier circuit configuration, including:
a data line for transmitting a data signal;
a switching device having a first terminal and a second terminal, the first terminal being connected to the data line;
an amplifier for current detection, the amplifier having a data signal input connected to the second terminal of the switching device and having an input resistance;
the amplifier including a control circuit for controlling the input resistance of the amplifier, the control circuit having a control terminal for receiving a control signal; and
the control terminal of the control circuit being connected, parallel to the switching device, to the data line.
In other words, the object of the invention is achieved by an amplifier circuit configuration having a data line for carrying a data signal, a switching device with a first terminal, which is connected to the data line, and an amplifier for current detection having a data signal input which is connected to the second terminal of the switching device, wherein the amplifier includes a control circuit or regulation circuit for controlling an input resistance of the amplifier with a terminal for a control signal, the terminal for the control signal of the control circuit being connected to the data line parallel to the switching device.
The control circuit of the amplifier controls the input resistance of the amplifier so that the amplifier has a relatively low input resistance. The controlled quantity is the voltage. A low input resistance means that the input voltage varies only slightly independent of the amount of an input current. Since the resistance of the switching device, which is contained in a multiplexer circuit, for example, is in series with the input resistance of the data signal input of the amplifier, the resistance of the overall circuit configuration for reading a data signal is increased by the resistance of the switching device.
Because the terminal for the control signal of the control circuit is connected to the data line and in a manner parallel to the switching device, the voltage is tapped as controlled quantity for the control circuit upstream from the switching device. As a result, the resistance of the switching device is taken into consideration in the controlling of an input resistance of the amplifier. Consequently, the input resistance of the overall circuit configuration for reading a data signal is barely increased by the in-series resistance of the switching device. The negative influence of the switching device on the dynamic response in the readout of the data signal is thus eliminated.
According to another feature of the invention, a further switching device having a first terminal and a second terminal is provided, the second terminal of the further switching device being connected to the data line, and the control terminal of the control circuit is connected to the first terminal of the further switching device.
In other words, in an advantageous embodiment of the invention, the terminal for the control signal (control terminal) of the control circuit is connected to a terminal of an additional switching device, and a second terminal of the additional switching device is connected to the data line. The terminal for the control signal of the control circuit is thereby provided with a switching device. It is thus possible for several data lines to be allocated to the amplifier, each respective one of which is connected to the amplifier by way of a multiplexer circuit. The respective data line is connected via the switching device and the additional switching device to the data signal input of the amplifier, i.e. to the terminal for the control signal of the control circuit.
If the amplifier circuit configuration includes several data lines, the switching device and the additional switching device are contained in a multiplexer circuit. The data lines are then connected to the multiplexer circuit, and the data In signal input of the amplifier and the terminal for the control signal of the control circuit are likewise connected to the multiplexer circuit.
In a further embodiment of the amplifier, the data signal input of the amplifier is connected to a controllable current source. The terminal for the control signal (control terminal) of the control circuit is connected to an input of the amplifier circuit, and an output of the amplifier circuit is connected to a control terminal of the current source. The amplifier circuit is suitable for voltage measurement and voltage amplification, for example. A high-resistance (high impedance) tapping is thus accomplished at the terminal for the control signal of the control circuit. The additional switching device, which is connected at the terminal for the control signal of the control circuit, can thus likewise be constructed to have a relatively high resistance. If the additional switching device is constructed as a transistor, this transistor can be constructed with a relatively small area.
Since the terminal for the control signal of the control circuit is connected to the data line, the control of the amplifier acts directly on the data line. Thus, the circuit characteristics of the amplifier circuit configuration are less sensitive to variations in the production process and temperature fluctuations.
The amplifier circuit configuration according to the invention can advantageously be used to read a data signal of a memory cell of an integrated semiconductor memory. To this end, the data line is connected to a terminal for a read signal of a memory cell of the integrated memory. The integrated memory is constructed as what is known as an SRAM, a ROM (Read-Only Memory), or a DRAM (Dynamic Random Access Memory). If the integrated memory includes a matrix-shaped memory cell array wherein the memory cells are combined into units of word lines and bit lines, the data line is constructed as one of the bit lines. In another embodiment, the data line is connected to the terminal for a read signal of a photocell of a photocell matrix.
According to another feature of the invention, the controllable current source includes a transistor having a transistor control terminal and a controlled path, the controlled path of the transistor is connected to the data signal input of the amplifier, and the current source control terminal is connected to the transistor control terminal.
According to yet another feature of the invention, the data line and the further data lines are respectively combined into pairs of data lines carrying complementary signals.
According to a further feature of the invention, the amplifier circuit includes a non-inverting amplifier, and the transistor is configured as an n-channel MOS transistor.
According to yet a further feature of the invention, a read signal terminal for a memory cell in an integrated memory is provided, and the data line is connected to the read signal terminal. Also, a read signal terminal for a photo cell in a photo cell matrix may be provided, and the data line is then connected to the read signal terminal.
With the objects of the invention in view there is also provided, a memory configuration, including:
an integrated memory having a memory cell and a read signal terminal for the memory cell;
a data line connected to the read signal terminal;
a switching device having a first terminal and a second terminal, the first terminal being connected to the data line;
an amplifier for current detection, the amplifier having a data signal input connected to the second terminal of the switching device and having an input resistance;
the amplifier including a control circuit for controlling the input resistance of the amplifier, the control circuit having a control terminal for receiving a control signal; and
the control terminal of the control circuit being connected, parallel to the switching device, to the data line.
With the objects of the invention in view there is also provided, a photo cell configuration, including:
a photo cell matrix having a photo cell and a read signal terminal for the photo cell;
a data line connected to the read signal terminal;
a switching device having a first terminal and a second terminal, the first terminal being connected to the data line;
an amplifier for current detection, the amplifier having a data signal input connected to the second terminal of the switching device and having an input resistance;
the amplifier including a control circuit for controlling the input resistance of the amplifier, the control circuit having a control terminal for receiving a control signal; and
the control terminal of the control circuit being connected, parallel to the switching device, to the data line.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in an amplifier circuit, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.